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To counterbalance @a1ba@suya.place's Elbrus posting... This is a Loongson 1C CPU board, an early low-speed SoC meant for embedded systems (0.13 µm, 300 MHz). The CPU implements the mips32r1 instruction set and part of mips32r2. It featured a out-of-order, dual-issue pipeline, with an additional 64-bit FPU. The CPU board only has a Samsung SDRAM and Micron Flash installed, meant to plugged into a devboard that I don't have, but it would be interesting to build a custom board and see if Linux boots... #mips#electronics
Front side of the CPU board, with a large QFP-176 chip marked "Loongson / LS1C0300A"
Back side of the CPU board, with DRAM, Flash, and pin headers visible.
Block diagram of the Loongson 1C SoC. A "GS232 CPU IP core" (aka Loongson core), a display controller, a camera port, and a SDRAM/SRAM is connected to a 64-bit "AXI" cross-bar switch. This is then connected to a AXI multiplier to other peripherals, including SPI, USB 2.0 OTG, Ethernet MAC, and MAC. Finally, a AXI to APB bridge offers access to ADC, WDT, RTC, PWM, I2C, UART, SDIO, I2S/AC97, NAND, CAN ports.
#electronics #mips @27329ed9-2211-a1ba-9371-e2641bf0dcb6

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